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  ? semiconductor components industries, llc, 2000 november, 2000 rev. 2 1 publication order number: mtp12p10/d mtp12p10 preferred device power mosfet 12 amps, 100 volts pchannel to220 this power mosfet is designed for medium voltage, high speed power switching applications such as switching regulators, converters, solenoid and relay drivers. ? silicon gate for fast switching speeds switching times specified at 100 c ? designer's data i dss , v ds(on) , v gs(th) and soa specified at elevated temperature ? rugged soa is power dissipation limited ? sourcetodrain diode characterized for use with inductive loads maximum ratings (t c = 25 c unless otherwise noted) rating symbol value unit drainsource voltage v dss 100 vdc draingate voltage (r gs = 1.0 m w ) v dgr 100 vdc gatesource voltage continuous nonrepetitive (t p 50 m s) v gs v gsm 20 40 vdc vpk drain current continuous drain current pulsed i d i dm 12 28 adc total power dissipation derate above 25 c p d 75 0.6 watts w/ c operating and storage temperature range t j , t stg 65 to 150 c thermal resistance junction to case junction to ambient r q jc r q ja 1.67 62.5 c/w maximum lead temperature for soldering purposes, 1/8 from case for 10 seconds t l 260 c d s g 12 amperes 100 volts r ds(on) = 300 m w device package shipping ordering information mtp12p10 to220ab 50 units/rail to220ab case 221a style 5 1 2 3 4 http://onsemi.com pchannel marking diagram & pin assignment mtp12p10 = device code ll = location code y = year ww = work week mtp12p10 llyww 1 gate 3 source 4 drain 2 drain preferred devices are recommended choices for future use and best overall value.
mtp12p10 http://onsemi.com 2 electrical characteristics (t j = 25 c unless otherwise noted) characteristic symbol min max unit off characteristics drainsource breakdown voltage (v gs = 0, i d = 0.25 ma) v (br)dss 100 vdc zero gate voltage drain current (v ds = rated v dss , v gs = 0) (v ds = rated v dss , v gs = 0, t j = 125 c) i dss 10 100 m adc gatebody leakage current, forward (v gsf = 20 vdc, v ds = 0) i gssf 100 nadc gatebody leakage current, reverse (v gsr = 20 vdc, v ds = 0) i gssr 100 nadc on characteristics (note 1.) gate threshold voltage (v ds = v gs , i d = 1.0 ma) t j = 100 c v gs(th) 2.0 1.5 4.5 4.0 vdc static drainsource onresistance (v gs = 10 vdc, i d = 6.0 adc) r ds(on) 0.3 ohm drainsource onvoltage (v gs = 10 v) (i d = 12 adc) (i d = 6.0 adc, t j = 100 c) v ds(on) 4.2 3.8 vdc forward transconductance (v ds = 15 v, i d = 6.0 a) g fs 2.0 mhos dynamic characteristics input capacitance (v ds = 25 v, v gs = 0, c iss 920 pf output capacitance (v ds = 25 v , v gs = 0 , f = 1.0 mhz) sfi 10 c oss 575 reverse transfer capacitance see figure 10 c rss 200 switching characteristics (note 1.) (t j = 100 c) turnon delay time t d(on) 50 ns rise time (v dd = 25 v, i d = 0.5 rated i d , r g =50 w ) t r 150 turnoff delay time r g = 50 w ) see figures 12 and 13 t d(off) 150 fall time see figures 12 and 13 t f 150 total gate charge (v ds = 0.8 rated v dss , q g 33 (typ) 50 nc gatesource charge (v ds = 0 . 8 rated v dss , i d = rated i d , v gs = 10 v) sfi 11 q gs 16 (typ) gatedrain charge ddgs see figure 11 q gd 17 (typ) sourcedrain diode characteristics (note 1.) forward onvoltage (i rtdi v sd 4.0 (typ) 5.5 vdc forward turnon time (i s = rated i d , v gs = 0 ) t on limited by stray inductance reverse recovery time v gs = 0) t rr 300 (typ) ns internal package inductance (to204) internal drain inductance (measured from the contact screw on the header closer to the source pin and the center of the die) l d 5.0 (typ) nh internal source inductance (measured from the source pin, 0.25 from the package to the source bond pad) l s 12.5 (typ) internal package inductance (to220) internal drain inductance (measured from the contact screw on tab to center of die) (measured from the drain lead 0.25 from package to center of die) l d 3.5 (typ) 4.5 (typ) nh internal source inductance (measured from the source lead 0.25 from package to source bond pad) l s 7.5 (typ) 1. pulse test: pulse width 300 m s, duty cycle 2%.
mtp12p10 http://onsemi.com 3 typical electrical characteristics -v ds , drain-to-source voltage (volts) figure 1. onregion characteristics t j , junction temperature ( c) figure 2. gatethreshold voltage variation with temperature v gs , gate-to-source voltage (volts) figure 3. transfer characteristics t j , junction temperature ( c) figure 4. normalized breakdown voltage versus temperature i d , drain current (amps) figure 5. onresistance versus drain current t j , junction temperature ( c) figure 6. onresistance variation with temperature -i d , drain current (amps) r ds(on) , drain-to-source resistance (ohms) r ds(on) , drain-to-source resistance (normalized) i d , drain current (amps) v gs(th) , gate threshold voltage (normalized) v br(dss) , drain-to-source breakdown voltage (normalized) 20 18 16 14 12 10 8 6 4 2 0 10 9 8 7 6 5 4 3 2 1 0 1.2 1.1 1 0.9 0.8 -50 -25 0 25 50 75 100 125 150 20 16 12 8 4 0 20 16 12 8 4 0 2 1.6 1.2 0.8 0.4 0 -50 -75 0 25 50 75 100 125 150 0.5 0.4 0.3 0.2 0.1 0 40 36 32 28 24 20 16 12 8 4 0 1.8 1.6 1.4 1.2 1 0.8 0.6 0.4 0.2 0 -50 -25 0 25 50 75 100 125 150 t j = 25 c v gs = -20 v 8 v 10 v 7 v 6 v 5 v v ds = v gs i d = 1 ma v ds = 20 v t j = -55 c 25 c 100 c v gs = 0 i d = 0.25 ma t j = 100 c 25 c -55 c v gs = 15 v v gs = 10 v i d = 6 a
mtp12p10 http://onsemi.com 4 safe operating area information i d , drain current (amps) i d , drain current (amps) v ds , drain-to-source voltage (volts) figure 7. maximum rated forward biased safe operating area v ds , drain-to-source voltage (volts) figure 8. maximum rated switching safe operating area 02040 6080 0 40 50 100 r ds(on) limit package limit thermal limit 10 v gs = 20 v single pulse t c = 25 c 1 1 10 10 m s 1 ms 10 ms 30 10 100 0.1 ms mtm/mtp12p06 mtm/mtp12p10 20 10 30 50 70 90 mtm/mtp12p06 mtm/mtp12p10 dc forward biased safe operating area the fbsoa curves define the maximum draintosource voltage and drain current that a device can safely handle when it is forward biased, or when it is on, or being turned on. because these curves include the limitations of simultaneous high voltage and high current, up to the rating of the device, they are especially useful to designers of linear systems. the curves are based on a case temperature of 25 c and a maximum junction temperature of 150 c. limitations for repetitive pulses at various case temperatures can be determined by using the thermal response curves. on semiconductor application note, an569, atransient thermal resistancegeneral data and its useo provides detailed instructions. switching safe operating area the switching safe operating area (soa) of figure 8 is the boundary that the load line may traverse without incurring damage to the mosfet. the fundamental limits are the peak current, i dm and the breakdown voltage, v (br)dss . the switching soa shown in figure 8 is applicable for both turnon and turnoff of the devices for switching times less than one microsecond. the power averaged over a complete switching cycle must be less than: t j(max) t c r q jc figure 9. thermal response r(t), normalized effective transient thermal resistance r q jc (t) = r(t) r q jc r q jc = 1.67 c/w max d curves apply for power pulse train shown read time at t 1 t j(pk) - t c = p (pk) r q jc (t) p (pk) t 1 t 2 duty cycle, d = t 1 /t 2 t, time (ms) 1 0.01 d = 0.5 0.05 0.01 single pulse 0.01 0.02 0.03 0.02 0.05 0.1 0.2 0.3 0.5 0.02 0.05 0.1 0.2 0.5 1 2 5 10 20 50 100 200 500 1000 0.1 0.2
mtp12p10 http://onsemi.com 5 v ds , source-to-drain voltage (volts) c, capacitance (pf) figure 10. capacitance variation 1600 40 30 1200 800 400 0 20 10 0 t c = 25 c v gs = 0 f = 1 mhz c oss c iss c rss 0 5 10 15 20 25 30 35 40 45 50 q g , total gate charge (nc) figure 11. gate charge versus gatetosource voltage t j = 25 c i d = 12 a v ds = 30 v 80 v 50 v v gs , gate source voltage (volts) 0 -2 -4 -6 -8 -10 -12 -14 -16 resistive switching pulse generator v dd v out v in r gen 50 w z = 50 w 50 w dut r l figure 12. switching test circuit t off output, v out t on t r t d(off) t f t d(on) 90% 90% 10% input, v in 10% 50% 90% 50% pulse width figure 13. switching waveforms inverted
mtp12p10 http://onsemi.com 6 package dimensions to220 threelead to220ab case 221a09 issue aa style 5: pin 1. gate 2. drain 3. source 4. drain notes: 1. dimensioning and tolerancing per ansi y14.5m, 1982. 2. controlling dimension: inch. 3. dimension z defines a zone where all body and lead irregularities are allowed. dim min max min max millimeters inches a 0.570 0.620 14.48 15.75 b 0.380 0.405 9.66 10.28 c 0.160 0.190 4.07 4.82 d 0.025 0.035 0.64 0.88 f 0.142 0.147 3.61 3.73 g 0.095 0.105 2.42 2.66 h 0.110 0.155 2.80 3.93 j 0.018 0.025 0.46 0.64 k 0.500 0.562 12.70 14.27 l 0.045 0.060 1.15 1.52 n 0.190 0.210 4.83 5.33 q 0.100 0.120 2.54 3.04 r 0.080 0.110 2.04 2.79 s 0.045 0.055 1.15 1.39 t 0.235 0.255 5.97 6.47 u 0.000 0.050 0.00 1.27 v 0.045 --- 1.15 --- z --- 0.080 --- 2.04 b q h z l v g n a k f 123 4 d seating plane t c s t u r j
mtp12p10 http://onsemi.com 7 notes
mtp12p10 http://onsemi.com 8 on semiconductor and are trademarks of semiconductor components industries, llc (scillc). scillc reserves the right to make changes without further notice to any products herein. scillc makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does scillc assume any liability arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation special, consequential or incidental damages. atypicalo parameters which may be provided in scill c data sheets and/or specifications can and do vary in different applications and actual performance may vary over time. all operating parameters, including atypicalso must be validated for each customer application by customer's technical experts. scillc does not convey any license under its patent rights nor the rights of others. scillc products are not designed, intended, or authorized for use as components in systems intended for surgical implant into the body , or other applications intended to support or sustain life, or for any other application in which the failure of the scillc product could create a sit uation where personal injury or death may occur. should buyer purchase or use scillc products for any such unintended or unauthorized application, buyer shall indemnify and hold scillc and its officers, employees, subsidiaries, affiliates, and distributors harmless against all claims, costs, damages, and expenses, and reasonable attorney fees arising out of, directly or indirectly, any claim of personal injury or death associated with such unintended or unauthori zed use, even if such claim alleges that scillc was negligent regarding the design or manufacture of the part. scillc is an equal opportunity/affirmative action employer. publication ordering information central/south america: spanish phone : 3033087143 (monfri 8:00am to 5:00pm mst) email : onlitspanish@hibbertco.com tollfree from mexico: dial 018002882872 for access then dial 8662979322 asia/pacific : ldc for on semiconductor asia support phone : 3036752121 (tuefri 9:00am to 1:00pm, hong kong time) toll free from hong kong & singapore: 00180044223781 email : onlitasia@hibbertco.com japan : on semiconductor, japan customer focus center 4321 nishigotanda, shinagawaku, tokyo, japan 1410031 phone : 81357402700 email : r14525@onsemi.com on semiconductor website : http://onsemi.com for additional information, please contact your local sales representative. mtp12p10/d north america literature fulfillment : literature distribution center for on semiconductor p.o. box 5163, denver, colorado 80217 usa phone : 3036752175 or 8003443860 toll free usa/canada fax : 3036752176 or 8003443867 toll free usa/canada email : onlit@hibbertco.com fax response line: 3036752167 or 8003443810 toll free usa/canada n. american technical support : 8002829855 toll free usa/canada europe: ldc for on semiconductor european support german phone : (+1) 3033087140 (monfri 2:30pm to 7:00pm cet) email : onlitgerman@hibbertco.com french phone : (+1) 3033087141 (monfri 2:00pm to 7:00pm cet) email : onlitfrench@hibbertco.com english phone : (+1) 3033087142 (monfri 12:00pm to 5:00pm gmt) email : onlit@hibbertco.com european tollfree access*: 0080044223781 *available from germany, france, italy, uk, ireland


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